Semiconductor device manufacturing apparatus

ABSTRACT

A semiconductor device manufacturing apparatus includes: a first pattern forming unit for forming a first pattern by patterning a first mask material layer; a boundary layer forming unit for forming a boundary layer at sidewall portions and top portions of the first pattern; a second mask material layer forming unit for forming a second mask material layer so as to cover a surface of the boundary layer; a second mask material removing unit for removing a part of the second mask material layer to expose top portions of the boundary layer; a boundary layer etching unit for forming a second pattern by etching and removing the boundary layer and forming a void between the sidewall portions of the first pattern and the second mask material layer; and a trimming unit for reducing a width of the first pattern and a width of the second pattern to predetermined widths.

FIELD OF THE INVENTION

The present disclosure relates to a pattern forming method for forming amask used in performing an etching process such as a plasma etchingprocess or the like on a substrate such as a semiconductor wafer or thelike; and also relates to a semiconductor device manufacturing methodand a semiconductor device manufacturing apparatus.

BACKGROUND OF THE INVENTION

Conventionally, in a manufacturing process for a semiconductor device orthe like, a microscopic circuit pattern has been formed by performing anetching process, e.g., a plasma etching process on a substrate such as asemiconductor wafer. In this etching process, a mask is formed by aphotolithography process employing a photoresist.

With respect to this photolithography process, there have been developedvarious techniques so as to keep up with the miniaturization of apattern to be formed. One example is so-called a double patterning. Inthe double patterning, a two-step patterning is performed. In one step,a first pattern is formed by a first lithography process of performingcoating, exposure and development processes on a photoresist; and in theother step, a second pattern is formed by a second lithography processof performing coating, exposure and development processes again on aphotoresist after the first lithography process. By performing thetwo-step patterning, it is possible to form a mask having a finer gap incomparison to a mask formed by performing the patterning only once (forexample, see Patent Document 1).

Patent Document 1: U.S. Pat. No. 7,064,078

BRIEF SUMMARY OF THE INVENTION

As stated above, in the double patterning technique, exposure processesare performed two times while lithography processes are performed twotimes. As a result, there have been problems that the process becomescomplicated and the manufacturing cost of a semiconductor deviceincreases; and there have been other problems that it is difficult toaccurately perform an alignment with respect to a first exposure processin a second exposure process and it is difficult to accurately performthe patterning.

In view of the foregoing, the present disclosure provides a patternforming method capable of accurately forming a microscopic patternwithout performing the second exposure process, thereby simplifying theprocess in comparison to the conventional process and reducing themanufacturing cost of the semiconductor device; and also provides asemiconductor device manufacturing method and a semiconductor devicemanufacturing apparatus.

In accordance with one aspect of the present disclosure, there isprovided a pattern forming method for forming a pattern of apredetermined shape which serves as a mask for etching an etching targetlayer on a substrate, the method including: a first pattern formingprocess for forming a first pattern by patterning a first mask materiallayer made of a photoresist; a boundary layer forming process forforming a boundary layer, which is made of a material selectivelyremovable with respect to the photoresist, at sidewall portions and topportions of the first pattern; a second mask material layer formingprocess for forming a second mask material layer, which is made of amaterial that allows the boundary layer to be selectively removed, so asto cover a surface of the boundary layer; a second mask materialremoving process for removing a part of the second mask material layerto expose top portions of the boundary layer; a boundary layer etchingprocess for forming a second pattern made of the second mask materiallayer by etching and removing the boundary layer and forming a voidbetween the sidewall portions of the first pattern and the second maskmaterial layer; and a trimming process for reducing a width of the firstpattern and a width of the second pattern to predetermined widths.

In accordance with another aspect of the present disclosure, there isprovided a pattern forming method for forming a pattern of apredetermined shape which serves as a mask for etching an etching targetlayer on a substrate, the method including: a first pattern formingprocess for forming a first pattern by patterning a first mask materiallayer made of a photoresist; a boundary layer forming process forforming a boundary layer, which is made of a material selectivelyremovable with respect to the photoresist, at sidewall portions and topportions of the first pattern; a second mask material layer formingprocess for forming a second mask material layer, which is made of amaterial that allows the boundary layer to be selectively removed, whiletop portions of the boundary layer are exposed; a boundary layer etchingprocess for forming a second pattern made of the second mask materiallayer by etching and removing the boundary layer and forming a voidbetween the sidewall portions of the first pattern and the second maskmaterial layer; and a trimming process for reducing a width of the firstpattern and a width of the second pattern to predetermined widths.

In accordance with still another aspect of the present disclosure, thereis provided a semiconductor device manufacturing method including aprocess for etching an etching target layer on a substrate through amask, wherein the mask is formed by a pattern forming method including:a first pattern forming process for forming a first pattern bypatterning a first mask material layer made of a photoresist; a boundarylayer forming process for forming a boundary layer, which is made of amaterial selectively removable with respect to the photoresist, atsidewall portions and top portions of the first pattern; a second maskmaterial layer forming process for forming a second mask material layer,which is made of a material that allows the boundary layer to beselectively removed, so as to cover a surface of the boundary layer; asecond mask material removing process for removing a part of the secondmask material layer to expose top portions of the boundary layer; aboundary layer etching process for forming a second pattern made of thesecond mask material layer by etching and removing the boundary layerand forming a void between the sidewall portions of the first patternand the second mask material layer; and a trimming process for reducinga width of the first pattern and a width of the second pattern topredetermined widths.

In accordance with still another aspect of the present disclosure, thereis provided a semiconductor device manufacturing method including aprocess for etching an etching target layer on a substrate through amask, wherein the mask is formed by a pattern forming method including:a first pattern forming process for forming a first pattern bypatterning a first mask material layer made of a photoresist; a boundarylayer forming process for forming a boundary layer, which is made of amaterial selectively removable with respect to the photoresist, atsidewall portions and top portions of the first pattern; a second maskmaterial layer forming process for forming a second mask material layer,which is made of a material that allows the boundary layer to beselectively removed, while top portions of the boundary layer areexposed; a boundary layer etching process for forming a second patternmade of the second mask material layer by etching and removing theboundary layer and forming a void between the sidewall portions of thefirst pattern and the second mask material layer; and a trimming processfor reducing a width of the first pattern and a width of the secondpattern to predetermined widths.

In accordance with still another aspect of the present disclosure, thereis provided a semiconductor device manufacturing apparatus for forming amask for etching an etching target layer on a substrate, the apparatusincluding: a first pattern forming unit for forming a first pattern bypatterning a first mask material layer made of a photoresist; a boundarylayer forming unit for forming a boundary layer, which is made of amaterial selectively removable with respect to the photoresist, atsidewall portions and top portions of the first pattern; a second maskmaterial layer forming unit for forming a second mask material layer,which is made of a material that allows the boundary layer to beselectively removed, so as to cover a surface of the boundary layer; asecond mask material removing unit for removing a part of the secondmask material layer to expose top portions of the boundary layer; aboundary layer etching unit for forming a second pattern made of thesecond mask material layer by etching and removing the boundary layerand forming a void between the sidewall portions of the first patternand the second mask material layer; and a trimming unit for reducing awidth of the first pattern and a width of the second pattern topredetermined widths.

In accordance with still another aspect of the present disclosure, thereis provided a semiconductor device manufacturing apparatus for forming amask for etching an etching target layer on a substrate, the apparatusincluding: a first pattern forming unit for forming a first pattern bypatterning a first mask material layer made of a photoresist; a boundarylayer forming unit for forming a boundary layer, which is made of amaterial selectively removable with respect to the photoresist, atsidewall portions and top portions of the first pattern; a second maskmaterial layer forming unit for forming a second mask material layer,which is made of a material that allows the boundary layer to beselectively removed, while top portions of the boundary layer areexposed; a boundary layer etching unit for forming a second pattern madeof the second mask material layer by etching and removing the boundarylayer and forming a void between the sidewall portions of the firstpattern and the second mask material layer; and a trimming unit forreducing a width of the first pattern and a width of the second patternto predetermined widths.

BRIEF DESCRIPTION OF THE DRAWINGS

The disclosure may best be understood by reference to the followingdescription taken in conjunction with the following figures:

FIGS. 1A to 1G are views for explaining a pattern forming method and asemiconductor device manufacturing method in accordance with anembodiment of the present disclosure;

FIG. 2 is a flowchart showing a process of the method of FIGS. 1A to 1G;

FIG. 3 is a block diagram showing a configuration of a semiconductordevice manufacturing apparatus in accordance with the embodiment of thepresent disclosure;

FIGS. 4A to 4F are views for explaining a pattern forming method and asemiconductor device manufacturing method in accordance with a secondembodiment of the present disclosure;

FIG. 5 is a flowchart showing a process of the method of FIGS. 4A to 4F;

FIG. 6 is a diagram showing a configuration of a semiconductor devicemanufacturing apparatus in accordance with the second embodiment of thepresent disclosure;

FIGS. 7A to 7K are views for explaining a pattern forming method and asemiconductor device manufacturing method in accordance with a thirdembodiment of the present disclosure;

FIGS. 8A to 8J are views for explaining a pattern forming method and asemiconductor device manufacturing method in accordance with a fourthembodiment of the present disclosure; and

FIGS. 9A to 9C are views for explaining a pattern forming process by asidewall transfer process.

EXPLANATION OF CODES

-   101: substrate-   102: first layer-   103: second layer-   104: third layer-   105: first pattern-   106: boundary layer-   107: second mask material layer

DETAILED DESCRIPTION OF THE INVENTION

Hereinafter, embodiments of the present disclosure will be described indetail with reference to the accompanying drawings.

FIGS. 1A to 1G show enlarged schematic views of a part of a substrate inaccordance with an embodiment of the present disclosure so as toillustrate a process of the present embodiment, and FIG. 2 is aflowchart showing the process of the present embodiment. As illustratedin FIGS. 1A to 1G, formed on a substrate 101 is a multilayer of a firstlayer 102, a second layer 103 and a third layer 104 which are made ofdifferent materials. Among these layers, at least one layer (the thirdlayer 104) becomes an etching target layer.

First, as illustrated in FIG. 1A, performed is a first pattern formingprocess for forming a first pattern 105, which is made of a photoresistpatterned in a predetermined pattern, by performing coating, exposureand development processes on the third layer 104 (Step 201 of FIG. 2).As the photoresist (first mask material) for forming the first pattern105, it is desirable to use an ArF resist so as to form a finer pattern,and a positive type chemically amplified resist may be used, forexample.

Subsequently, as illustrated in FIG. 1B, performed is a boundary layerforming process for forming a boundary layer 106 at sidewall portionsand top portions of the first pattern 105 (Step 202 of FIG. 2). Theboundary layer 106 can be formed by a film forming process or bymodifying surfaces of the sidewall portions and the top portions of thefirst pattern 105 (FIG. 1B shows a case of the film forming process).The boundary layer 106 needs to be made of a material which can beselectively removed with respect to the photoresist constituting thefirst pattern 105. In case that the boundary layer 106 is formed by thefilm forming process, SiO₂ can be appropriately used as the material,for example. In case of forming the boundary layer 106 by using SiO₂, itis necessary to perform the film forming process at a temperature lowerthan a heat resistant temperature of the first pattern 105, and forexample, a low temperature CVD (Chemical Vapor Deposition) or an ALD(Atomic Layer Deposition) is performed. A thickness of the boundarylayer 106 is set to be, for example, about 5 to 20 nm. Meanwhile, incase of forming the boundary layer 106 by modifying the surfaces of thesidewall portions and the top portions of the first pattern 105, it ispossible to employ a method of silylating by using an HMDS or the like,or a method of oxidizing by supplying acid to the photoresist.

Thereafter, as illustrated in FIG. 1C, performed is a second maskmaterial layer forming process for forming a second mask material layer107 so as to cover surfaces of the boundary layer 106 (Step 203 of FIG.2). The second mask material layer 107 needs to be made of a materialwhich allows the boundary layer 106 to be selectively removed, and aphotoresist or an organic film can be used, for example. In case ofusing the photoresist, it may be possible to use the same photoresist asthe photoresist constituting the first pattern 105 or use a differentkind of photoresist (e.g., a KrF resist if the first pattern 105 is madeof an ArF resist). In this case, the second mask material layer 107 canbe formed through a coating process by a spin coating apparatus orthrough a film forming process by a CVD apparatus.

Further, as illustrated in FIG. 1D, performed is a second mask materialremoving process for removing a part (surface layer) of the second maskmaterial layer 107 till top portions of the boundary layer 106 areexposed (Step 204 of FIG. 2). In this second mask material removingprocess, there may be used a removing method by melting with liquidchemical, a removing method by a dry etching or a chemical and physicalremoving method by a CMP.

Subsequently, as illustrated in FIG. 1E, performed is a boundary layeretching process for forming a second pattern made of the second maskmaterial layer 107 by selectively etching and removing the boundarylayer 106 with respect to the first pattern 105 and the second maskmaterial layer 107 (Step 205 of FIG. 2). In this case, since theboundary layer 106 is formed by modifying, for example, SiO₂ or thephotoresist, it is easy to selectively etch the boundary layer 106 withrespect to the first pattern 105 made of the photoresist and the secondmask material layer 107 made of the photoresist or the organic film. Theboundary layer etching process can be performed by, e.g., a dry etchingor a wet etching using dilute hydrofluoric acid.

Thereafter, as illustrated in FIG. 1F, performed is a trimming processfor reducing a width of the first pattern 105 and a width of the secondpattern made of the second mask material layer 107 to predeterminedwidths (Step 206 of FIG. 2). The trimming process can be performed by,for example, an immersion method in a developing solution having a hightemperature or a high concentration for a long period of time; adeveloping method after a coating process with an acid material or anexposing process to an acid vapor atmosphere; a method of performing apre-processing of an immersion process in a developing solution having ahigh temperature or a high concentration for a long period of time andthen performing a developing process after a coating process with anacid material or an exposing process to an acid vapor atmosphere; or amethod of performing a coating process with an acid material or anexposing process to an acid vapor atmosphere and then performing adeveloping process after coating a top portion of a pattern with anamine-based material neutralizing the acid or exposing it to a vaporatmosphere.

Through performing the above-stated process, a pattern serving as anetching mask is formed. Further, by using this pattern as a mask,performed is an etching process on the third layer 104 as a lower layeror the like, as illustrated in FIG. 1G.

As stated above, in the pattern forming method in accordance with thepresent embodiment, it is possible to form a pattern as fine as that ofthe conventional double patterning by performing only the first exposureprocess for forming the first pattern 105 without requiring a secondexposure process. Therefore, there is no need for an alignment to beperformed in the second exposure process and there occurs nomisalignment during the alignment. Accordingly, it is possible toaccurately form a pattern and to simplify the process in comparison tothe conventional process, thereby reducing a manufacturing cost of asemiconductor device.

FIG. 3 shows a configuration of a semiconductor device manufacturingapparatus for performing the above-stated pattern forming method. Asillustrated in FIG. 3, a semiconductor device manufacturing apparatus300 includes a first pattern forming unit 301, a boundary layer formingunit 302, a second mask material layer forming unit 303, a second maskmaterial removing unit 304, a boundary layer etching unit 305 and atrimming unit 306. Further, each of these units is connected to eachother by a substrate transfer path 310 for transferring a substrate suchas a semiconductor wafer or the like.

The first pattern forming unit 301 is used for forming the first pattern105, and includes a coating device, an exposure device, a developingdevice and the like. The boundary layer forming unit 302 is used forforming the boundary layer 106, and includes a film forming apparatussuch as a CVD apparatus or a surface modifying apparatus for modifyingthe surfaces of the sidewall portions and the top portions of the firstpattern 105. The second mask material layer forming unit 303 is used forforming the second mask material layer 107, and includes a coatingdevice for coating a photoresist or a film forming apparatus for formingan organic film. The second mask material removing unit 304 is used forperforming the second mask material removing process which removes apart of the second mask material layer 107 till the top portion of theboundary layer 106 is exposed, and includes a wet or dry etchingapparatus, or a CMP apparatus. The boundary layer etching unit 305 isused for performing the boundary layer etching process in which theboundary layer 106 is selectively etched and removed with respect to thefirst pattern 105 and the second mask material layer 107, and includes awet or dry etching apparatus. The trimming unit 306 is used forperforming the trimming process, and includes an apparatus for immersinga semiconductor wafer into liquid chemical such as a developing solutionor for exposing the semiconductor wafer to a vapor atmosphere. With thesemiconductor device manufacturing apparatus 300 configured as statedabove, it is possible to perform a series of the processes in theabove-stated embodiment.

Hereinafter, a second embodiment will be described with reference toFIGS. 4A to 6. FIGS. 4A to 4F are enlarged schematic views of a part ofa substrate in accordance with the second embodiment so as to illustratea process of the second embodiment, and FIG. 5 is a flowchart showingthe process of the second embodiment. In the second embodiment, asillustrated in FIG. 4C, a second mask material layer 107 is formed sothat a top portion of a boundary layer 106 is exposed in a second maskmaterial layer forming process (Step 403 of FIG. 5). Therefore, thesecond embodiment does not include a process corresponding to the secondmask material removing process (Step 204 of FIG. 2) performed in thefirst embodiment. In this manner, in order to form the second maskmaterial layer 107 so that the top portion of the boundary layer 106 isexposed, these materials are selected so that a wettability of theboundary layer 106 is lower with respect to the second mask material(for example, different materials having polarity), and a liquid phasesecond mask material may be coated onto the boundary layer 106 torealize this process.

In addition, the other processes are performed in the same manner as inthe first embodiment so that the explanation thereof is omitted. In thesecond embodiment, it is possible to obtain the same effect as that ofthe first embodiment and also, as stated above, it is possible to omitthe second mask material removing process so that the process can bemore simplified.

FIG. 6 illustrates a configuration of a semiconductor devicemanufacturing apparatus for performing the pattern forming method inaccordance with the second embodiment. As illustrated in FIG. 6, asemiconductor device manufacturing apparatus 300 a includes a firstpattern forming unit 301, a boundary layer forming unit 302, a secondmask material layer forming unit 303, a boundary layer etching unit 305and a trimming unit 306. Further, each of these units is connected toeach other by a substrate transfer path 310 for transferring a substratesuch as a semiconductor wafer or the like. That is, the semiconductordevice manufacturing apparatus 300 a is different from the semiconductordevice manufacturing apparatus 300 illustrated in FIG. 3 only in that itdoes not include the second mask material removing unit 304. With thesemiconductor device manufacturing apparatus 300 a configured as statedabove, it is possible to perform a series of the processes in the secondembodiment.

A repeated pattern of a narrow pitch formed by the above-stated processcan be used in a semiconductor device such as a NAND-type flash memory.As a method for forming the repeated pattern of a narrow pitch, therehas been conventionally known a method employing, for example, aso-called sidewall transfer process.

In the sidewall transfer process, as illustrated in FIGS. 9A to 9C, afilm 602 serving as a mask is formed at sidewalls of a first pattern 601formed by a lithography process using a photoresist, and by removing thefirst pattern 601 formed first, two patterns are formed from onepattern, thereby forming a pattern of a narrow pitch.

In this case, as illustrated in FIG. 9A, a pattern formed at thesidewalls of the first pattern 601 is formed in a loop shape throughoutthe entire periphery of the sidewalls. For this reason, as illustratedin FIG. 9B, performed is a second photolithography process so as toremove an unnecessary part of this loop (end loop). Subsequently, thefirst pattern 601 is removed from a state illustrated in FIG. 9C, andthe pattern at the sidewalls is used as a mask. If a pattern of aperipheral circuit or the like is formed at the periphery of therepeated pattern described above, a third photolithography process isperformed to form the pattern of the peripheral circuit or the like.

This is because that in case of forming the pattern of the peripheralcircuit partially connected with the repeated pattern, since therepeated pattern is formed at the sidewalls of the first pattern 601 asdescribed above, the pattern of the peripheral circuit connected withthe repeated pattern can not be formed during the first photolithographyprocess. Further, since the second photolithography process is performedto remove the end loop, the pattern connected with the repeated patterncan not be formed without performing this process.

Contrary to this, in the aforementioned embodiments, since the part ofthe first pattern 105 made of the photoresist formed in the firstpattern forming process remains as a part of the repeated pattern in theend, it is possible to form a pattern of a peripheral circuit partiallyconnected with the repeated pattern during the photolithography processof the first pattern forming process.

FIGS. 7A to 7K illustrate a process of a third embodiment of forming amemory cell unit having a repeated pattern of a narrow pitch such as aNAND-type flash memory and a peripheral circuit electrically connectedwith this memory cell unit, and schematically illustrate cross-sectionalconfigurations thereof in upper sides and plane configurations thereofin lower sides.

In the third embodiment, as illustrated in FIG. 7A, during a processcorresponding to the first pattern forming process illustrated in FIG.1A, formed are a repeated pattern portion 501 in which a plurality ofsame patterns is formed at a predetermined distance and a peripheralcircuit pattern portion 502 formed at a periphery of the repeatedpattern portion 501. A part of the peripheral circuit pattern portion502 may be connected with the repeated pattern portion 501.

Subsequently, as illustrated in FIGS. 7B to 7D, performed are a boundarylayer forming process (FIG. 7B) for forming a boundary layer 106 asillustrated in FIG. 1B, a second mask material layer forming process(FIG. 7C) for forming a second mask material layer 107 to cover asurface of the boundary layer 106, and a second mask material removingprocess (FIG. 7D) for removing a part (surface layer) of the second maskmaterial layer 107 till top portions of the boundary layer 106 areexposed.

Thereafter, there is performed a second boundary layer forming process(FIG. 7E) for forming a second boundary layer 120 made of a material(e.g., SiO₂ or the like), which can be selectively removed with respectto a photoresist, on the second mask material layer 107 and the boundarylayer 106.

Then, performed is a third mask material layer forming process (FIG. 7F)for forming a third mask material layer 121, which is made of aphotoresist and formed in a predetermined pattern, on the secondboundary layer 120. The third mask material layer 121 is formed in apattern capable of removing unnecessary parts of the second maskmaterial layer 107.

Subsequently, there are performed a process (FIG. 7G) of etching thesecond boundary layer 120 into a predetermined pattern by using thethird mask material layer 121 as a mask, and an etching process (FIG.7H) of etching the unnecessary parts of the second mask material layer107 by using the second boundary layer 120 of the predetermined patternas a mask.

Thereafter, performed is a process (FIG. 7I), which corresponds to theboundary layer etching process as illustrated in FIG. 1E, for etchingthe boundary layer 106, and then performed is a process (FIG. 7J)corresponding to the trimming process for reducing a width of the firstpattern 105 and a width of the second pattern made of the second maskmaterial layer 107 to predetermined widths as illustrated in FIG. 1F. Asa result, a pattern serving as an etching mask is formed. Further, byusing this pattern as a mask, performed is a process (FIG. 7K), whichcorresponds to the etching process as illustrated in FIG. 1G, foretching a third layer 104 and the like as a lower layer.

As stated above, in the third embodiment, by performing thephotolithography processes two times, it is possible to form therepeated pattern and the pattern of the peripheral circuit or the like.

Hereinafter, by a process corresponding to the above-described secondembodiment, explained with reference to FIGS. 8A to 8J is a fourthembodiment of forming a memory cell unit having a repeated pattern of anarrow pitch such as a NAND-type flash memory and a peripheral circuitelectrically connected with this memory cell unit. Further, FIGS. 8A to8J schematically illustrate cross-sectional configurations thereof inthe upper side and plane configurations thereof in the lower side.

In the fourth embodiment, as illustrated in FIG. 8A, during a processcorresponding to the first pattern forming process illustrated in FIG.4A, formed are a repeated pattern portion 501 in which a plurality ofsame patterns is formed at a predetermined distance and a peripheralcircuit pattern portion 502 formed at a periphery of the repeatedpattern portion 501. A part of the peripheral circuit pattern portion502 may be connected with the repeated pattern portion 501.

Subsequently, as illustrated in FIGS. 8B and 8C, performed are aboundary layer forming process (FIG. 8B) for forming a boundary layer106 as illustrated in FIG. 4B, and a second mask material layer formingprocess (FIG. 8C) for forming a second mask material layer 107 so thattop portions of the boundary layer 106 are exposed.

Thereafter, there is performed a second boundary layer forming process(FIG. 8D) for forming a second boundary layer 120 made of a material(e.g., SiO₂ or the like), which can be selectively removed with respectto the photoresist, on the second mask material layer 107 and theboundary layer 106.

Then, performed is a third mask material layer forming process (FIG. 8E)for forming a third mask material layer 121, which is made of aphotoresist formed in a predetermined pattern, on the second boundarylayer 120. The third mask material layer 121 is formed in a patterncapable of removing unnecessary parts of the second mask material layer107.

Subsequently, there are performed a process (FIG. 8F) of etching thesecond boundary layer 120 into a predetermined pattern by using thethird mask material layer 121 as a mask, and an etching process (FIG.8G) of etching the unnecessary parts of the second mask material layer107 by using the second boundary layer 120 of the predetermined patternas a mask.

Thereafter, performed is a process (FIG. 8H), which corresponds to theboundary layer etching process as illustrated in FIG. 4D, for etchingthe boundary layer 106, and then performed is a process (FIG. 8I)corresponding to the trimming process for reducing a width of the firstpattern 105 and a width of the second pattern made of the second maskmaterial layer 107 to predetermined widths as illustrated in FIG. 4E. Asa result, a pattern serving as an etching mask is formed. Further, byusing this pattern as a mask, performed is a process (FIG. 8J), whichcorresponds to the etching process as illustrated in FIG. 4F, foretching a third layer 104 and the like as a lower layer.

As stated above, in the fourth embodiment, by performing thephotolithography processes two times, it is possible to form therepeated pattern and the pattern of the peripheral circuit or the like.

The above description of the present invention is provided for thepurpose of illustration, and it would be understood by those skilled inthe art that various changes and modifications may be made withoutchanging technical conception and essential features of the presentinvention. Thus, it is clear that the above-described embodiments areillustrative in all aspects and do not limit the present invention.

1. A semiconductor device manufacturing apparatus for forming a mask foretching an etching target layer on a substrate, the apparatuscomprising: a first pattern forming unit for forming a first pattern bypatterning a first mask material layer made of a photoresist; a boundarylayer forming unit for forming a boundary layer, which is made of amaterial selectively removable with respect to the photoresist, atsidewall portions and top portions of the first pattern; a second maskmaterial layer forming unit for forming a second mask material layer,which is made of a material that allows the boundary layer to beselectively removed, so as to cover a surface of the boundary layer; asecond mask material removing unit for removing a part of the secondmask material layer to expose top portions of the boundary layer; aboundary layer etching unit for forming a second pattern made of thesecond mask material layer by etching and removing the boundary layerand forming a void between the sidewall portions of the first patternand the second mask material layer; and a trimming unit for reducing awidth of the first pattern and a width of the second pattern topredetermined widths.
 2. A semiconductor device manufacturing apparatusfor forming a mask for etching an etching target layer on a substrate,the apparatus comprising: a first pattern forming unit for forming afirst pattern by patterning a first mask material layer made of aphotoresist; a boundary layer forming unit for forming a boundary layer,which is made of a material selectively removable with respect to thephotoresist, at sidewall portions and top portions of the first pattern;a second mask material layer forming unit for forming a second maskmaterial layer, which is made of a material that allows the boundarylayer to be selectively removed, while top portions of the boundarylayer are exposed; a boundary layer etching unit for forming a secondpattern made of the second mask material layer by etching and removingthe boundary layer and forming a void between the sidewall portions ofthe first pattern and the second mask material layer; and a trimmingunit for reducing a width of the first pattern and a width of the secondpattern to predetermined widths.